313 lines
13 KiB
C++
313 lines
13 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2022 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*
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* @modified Tom Clay, 2026 - Adapted for ReXGlue runtime
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*/
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#pragma once
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#include <atomic>
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#include <cstring>
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#include <functional>
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#include <memory>
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#include <mutex>
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#include <queue>
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#include <string>
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#include <unordered_map>
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#include <vector>
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#include <rex/graphics/register_file.h>
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#include <rex/graphics/registers.h>
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#include <rex/graphics/trace_writer.h>
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#include <rex/graphics/xenos.h>
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#include <rex/memory.h>
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#include <rex/memory/ring_buffer.h>
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#include <rex/system/xthread.h>
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#include <rex/thread.h>
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#include <rex/ui/presenter.h>
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namespace rex::stream {
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class ByteStream;
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} // namespace rex::stream
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namespace rex::graphics {
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class GraphicsSystem;
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class Shader;
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enum class ReadbackResolveMode {
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kDisabled,
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kFast,
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kSome,
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kFull,
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kAuto,
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};
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struct SwapState {
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// Lock must be held when changing data in this structure.
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std::mutex mutex;
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// Dimensions of the framebuffer textures. Should match window size.
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uint32_t width = 0;
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uint32_t height = 0;
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// Current front buffer, being drawn to the screen.
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uintptr_t front_buffer_texture = 0;
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// Current back buffer, being updated by the CP.
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uintptr_t back_buffer_texture = 0;
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// Backend data
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void* backend_data = nullptr;
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// Whether the back buffer is dirty and a swap is pending.
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bool pending = false;
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};
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enum class SwapMode {
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kNormal,
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kIgnored,
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};
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enum class GammaRampType {
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kUnknown = 0,
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kTable,
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kPWL,
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};
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class CommandProcessor {
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public:
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enum class SwapPostEffect {
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kNone,
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kFxaa,
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kFxaaExtreme,
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};
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CommandProcessor(GraphicsSystem* graphics_system, system::KernelState* kernel_state);
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virtual ~CommandProcessor();
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uint32_t counter() const { return counter_; }
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void increment_counter() { counter_++; }
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Shader* active_vertex_shader() const { return active_vertex_shader_; }
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Shader* active_pixel_shader() const { return active_pixel_shader_; }
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virtual bool Initialize();
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virtual void Shutdown();
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void CallInThread(std::function<void()> fn);
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virtual void ClearCaches();
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virtual void InvalidateGpuMemory();
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// "Desired" is for the external thread managing the post-processing effect.
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SwapPostEffect GetDesiredSwapPostEffect() const { return swap_post_effect_desired_; }
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void SetDesiredSwapPostEffect(SwapPostEffect swap_post_effect);
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// Implementations must not make assumptions that the front buffer will
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// necessarily be a resolve destination - it may be a texture generated by any
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// means like written to by the CPU or loaded from a file (the disclaimer
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// screen right in the beginning of 4D530AA4 is not a resolved render target,
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// for instance).
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virtual void IssueSwap(uint32_t frontbuffer_ptr, uint32_t frontbuffer_width,
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uint32_t frontbuffer_height) = 0;
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// May be called not only from the command processor thread when the command
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// processor is paused, and the termination of this function may be explicitly
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// awaited.
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virtual void InitializeShaderStorage(const std::filesystem::path& cache_root, uint32_t title_id,
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bool blocking);
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virtual void RequestFrameTrace(const std::filesystem::path& root_path);
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virtual void BeginTracing(const std::filesystem::path& root_path);
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virtual void EndTracing();
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virtual void TracePlaybackWroteMemory(uint32_t base_ptr, uint32_t length) = 0;
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void RestoreRegisters(uint32_t first_register, const uint32_t* register_values,
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uint32_t register_count, bool execute_callbacks);
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void RestoreGammaRamp(const reg::DC_LUT_30_COLOR* new_gamma_ramp_256_entry_table,
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const reg::DC_LUT_PWL_DATA* new_gamma_ramp_pwl_rgb,
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uint32_t new_gamma_ramp_rw_component);
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virtual void RestoreEdramSnapshot(const void* snapshot) = 0;
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void InitializeRingBuffer(uint32_t ptr, uint32_t size_log2);
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void EnableReadPointerWriteBack(uint32_t ptr, uint32_t block_size_log2);
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void UpdateWritePointer(uint32_t value);
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void ExecutePacket(uint32_t ptr, uint32_t count);
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bool is_paused() const { return paused_; }
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void Pause();
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void Resume();
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bool Save(::rex::stream::ByteStream* stream);
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bool Restore(::rex::stream::ByteStream* stream);
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protected:
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struct IndexBufferInfo {
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xenos::IndexFormat format = xenos::IndexFormat::kInt16;
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xenos::Endian endianness = xenos::Endian::kNone;
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uint32_t count = 0;
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uint32_t guest_base = 0;
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size_t length = 0;
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};
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void WorkerThreadMain();
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virtual bool SetupContext() = 0;
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virtual void ShutdownContext() = 0;
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virtual void WriteRegister(uint32_t index, uint32_t value);
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uint32_t ReadRegisterValue(uint32_t index) const;
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virtual void WriteRegistersFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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virtual void WriteRegisterRangeFromRing(memory::RingBuffer* ring, uint32_t base,
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uint32_t num_registers);
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void WriteALURangeFromRing(memory::RingBuffer* ring, uint32_t base, uint32_t num_registers);
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void WriteFetchRangeFromRing(memory::RingBuffer* ring, uint32_t base, uint32_t num_registers);
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void WriteBoolRangeFromRing(memory::RingBuffer* ring, uint32_t base, uint32_t num_registers);
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void WriteLoopRangeFromRing(memory::RingBuffer* ring, uint32_t base, uint32_t num_registers);
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void WriteREGISTERSRangeFromRing(memory::RingBuffer* ring, uint32_t base, uint32_t num_registers);
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void WriteALURangeFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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void WriteFetchRangeFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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void WriteBoolRangeFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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void WriteLoopRangeFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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void WriteREGISTERSRangeFromMem(uint32_t start_index, uint32_t* base, uint32_t num_registers);
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const reg::DC_LUT_30_COLOR* gamma_ramp_256_entry_table() const {
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return gamma_ramp_256_entry_table_;
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}
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const reg::DC_LUT_PWL_DATA* gamma_ramp_pwl_rgb() const { return gamma_ramp_pwl_rgb_[0]; }
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virtual void OnGammaRamp256EntryTableValueWritten() {}
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virtual void OnGammaRampPWLValueWritten() {}
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virtual void MakeCoherent();
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virtual void PrepareForWait();
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virtual void ReturnFromWait();
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uint32_t ExecutePrimaryBuffer(uint32_t start_index, uint32_t end_index);
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virtual void OnPrimaryBufferEnd() {}
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void ExecuteIndirectBuffer(uint32_t ptr, uint32_t length);
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bool ExecutePacket(memory::RingBuffer* reader);
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bool ExecutePacketType0(memory::RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType1(memory::RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType2(memory::RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType3(memory::RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType3_ME_INIT(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_NOP(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_INTERRUPT(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_XE_SWAP(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_INDIRECT_BUFFER(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_WAIT_REG_MEM(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_REG_RMW(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_REG_TO_MEM(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_MEM_WRITE(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_COND_WRITE(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE_SHD(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE_EXT(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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virtual bool ExecutePacketType3_EVENT_WRITE_ZPD(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3Draw(memory::RingBuffer* reader, uint32_t packet, const char* opcode_name,
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uint32_t viz_query_condition, uint32_t count_remaining);
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bool ExecutePacketType3_DRAW_INDX(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_DRAW_INDX_2(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT2(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_LOAD_ALU_CONSTANT(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_SET_SHADER_CONSTANTS(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_IM_LOAD(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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bool ExecutePacketType3_IM_LOAD_IMMEDIATE(memory::RingBuffer* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_INVALIDATE_STATE(memory::RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_VIZ_QUERY(memory::RingBuffer* reader, uint32_t packet, uint32_t count);
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virtual Shader* LoadShader(xenos::ShaderType shader_type, uint32_t guest_address,
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const uint32_t* host_address, uint32_t dword_count) = 0;
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virtual bool IssueDraw(xenos::PrimitiveType prim_type, uint32_t index_count,
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IndexBufferInfo* index_buffer_info, bool major_mode_explicit) = 0;
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virtual bool IssueCopy() = 0;
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// "Actual" is for the command processor thread, to be read by the
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// implementations.
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SwapPostEffect GetActualSwapPostEffect() const { return swap_post_effect_actual_; }
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virtual void InitializeTrace();
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// Shared readback resolve mode with backend legacy-flag alias support.
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ReadbackResolveMode GetReadbackResolveMode(bool legacy_readback_resolve_enabled) const;
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// Shared memexport readback enable state with backend legacy-flag override support.
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bool IsReadbackMemexportEnabled(bool legacy_backend_flag) const;
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memory::Memory* memory_ = nullptr;
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system::KernelState* kernel_state_ = nullptr;
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GraphicsSystem* graphics_system_ = nullptr;
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RegisterFile* register_file_ = nullptr;
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TraceWriter trace_writer_;
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enum class TraceState {
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kDisabled,
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kStreaming,
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kSingleFrame,
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};
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TraceState trace_state_ = TraceState::kDisabled;
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std::filesystem::path trace_stream_path_;
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std::filesystem::path trace_frame_path_;
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std::atomic<bool> worker_running_;
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system::object_ref<system::XHostThread> worker_thread_;
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std::queue<std::function<void()>> pending_fns_;
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// MicroEngine binary from PM4_ME_INIT
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std::vector<uint32_t> me_bin_;
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uint32_t counter_ = 0;
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uint32_t primary_buffer_ptr_ = 0;
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uint32_t primary_buffer_size_ = 0;
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uint32_t read_ptr_index_ = 0;
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uint32_t read_ptr_update_freq_ = 0;
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uint32_t read_ptr_writeback_ptr_ = 0;
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std::unique_ptr<rex::thread::Event> write_ptr_index_event_;
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std::atomic<uint32_t> write_ptr_index_;
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// Some titles submit writes beyond the emulated register file range in PM4
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// packets. Preserve these values so dependent packet logic can still observe
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// them instead of dropping the write entirely.
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std::unordered_map<uint32_t, uint32_t> extended_register_values_;
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uint64_t bin_select_ = 0xFFFFFFFFull;
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uint64_t bin_mask_ = 0xFFFFFFFFull;
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Shader* active_vertex_shader_ = nullptr;
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Shader* active_pixel_shader_ = nullptr;
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bool paused_ = false;
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// By default (such as for tools), post-processing is disabled.
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// "Desired" is for the external thread managing the post-processing effect.
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SwapPostEffect swap_post_effect_desired_ = SwapPostEffect::kNone;
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SwapPostEffect swap_post_effect_actual_ = SwapPostEffect::kNone;
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// Set by backend command processors to their legacy memexport readback cvar
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// name (for explicit-override compatibility).
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const char* legacy_readback_memexport_cvar_name_ = nullptr;
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private:
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reg::DC_LUT_30_COLOR gamma_ramp_256_entry_table_[256] = {};
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reg::DC_LUT_PWL_DATA gamma_ramp_pwl_rgb_[128][3] = {};
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uint32_t gamma_ramp_rw_component_ = 0;
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};
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} // namespace rex::graphics
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